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PCI66-16AI64SSC
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PCI66-16AI64SSC , 64-Channel, 16-Bit Simultaneous Sampling
PCI66-16AI64SSC , 64-Channel, 16-Bit Simultaneous Sampling
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 PCI66-16AI64SSC (PDF 233Ko)

Features
  • 64 Analog Inputs with Dedicated 200KSPS 16-Bit ADC per Channel
  • Simultaneous Sampling of all Inputs; Minimum Data Skew
  • Sampling Rates to 200 KSPS per Channel (12.8 MSPS Aggregate Rate)
  • D32 / D64; 33MHz, 66MHz PCI Compatibility, with Universal 5V/3.3V Signaling
  • Increased Throughput Capacity with Local Data Packing
  • Selectable Differential Processing Simulates Differential Operation of Channel Pairs
  • Input Ranges: ±10V, ±5V, ±2.5V, 0/+5V, 0/+10V; Software-Selectable • Hardware Sync I/O for Multiboard Operation
  • 1 MByte FIFO Data Buffer
  • 2-Channel DMA Engine
  • Sampling Controlled by Internal Rate Generator, by Software Trigger, or Externally
  • On-Demand Internal Autocalibration of all Channels
  • Completely Software-Configurable; No Field Jumpers
  • Auxiliary PXI Triggering Port Available through P1, P2.
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Description
  • The 16-Bit PMC66-16AI64SSC analog input board samples and digitizes 64 input channels simultaneously at rates up to 200,000 samples per second for each channel. Each input channel contains a dedicated 16-Bit sampling ADC, and the resulting 16-bit sampled data is available to the PCI bus through a 1 MByte FIFO buffer. The 32-Bit local data path supports full D32 local-bus data packing. Throughput capacity is further enhanced with 66MHz PCI support and increased local clocking frequency. All operational parameters are software configurable.

  • Inputs can be sampled in groups of 2, 4, 8, 16, 32 or 64 channels; or any single channel can be sampled continuously. The sample clock can be generated from an internal rate generator, or by software or external hardware. Input ranges are software-selectable as ±10V, ±5V or ±2.5V.

  • An on-demand autocalibration feature determines offset and gain correction values for each input channel, and applies the corrections subsequently during acquisition. A selftest switching network routes calibration reference signals to each channel through internal selftest switches, and permits board integrity to be verified by the host..
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