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PulseBlasterDDS-I-300 Pulse Pattern Generator
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PulseBlasterDDS-I-300 RF TTL/CMOS pulse/pattern generator
PulseBlasterDDS-I-300 RF TTL/CMOS pulse/pattern generator
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 PulseBlasterDDS-I-300 (PDF 197Ko)

Features
  • Timing resolution of 13.3 ns with a 50 MHz external clock (NOTE: Timing resolution of 2.5 ns is available on non-DDS, TTL-only PulseBlasterESR boards operating up to 400 MHz).
  • 9 independent output bits.
  • Simple instruction set.
  • Memory space for up to 32k program words (VLIW, 80-bit wide).
  • External hardware and software triggering.
  • 3.3 V or 5 V (ISA boards only) digital TTL/CMOS outputs, 25 mA per pin.  Output bits can be combined to increase the max. load current.
  • Multi-board synchronization.
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Description

PulseBlasterDDSTM is a general-purpose, intelligent, programmable, RF and TTL/CMOS pulse/pattern generator system (PCI or USB board or a portable stand-alone system).
The PulseBlasterDDSTM series of Intelligent Pulse Generation boards from SpinCore Technologies, Inc., couples SpinCore’s unique Intelligent Pulse Timing Processor core, dubbed PulseBlasterTM, with Direct Digital Synthesis (DDS) technology for use in system control and radio-frequency (RF) pulse generation.

The PulseBlasterTM processor, implemented in state-of-the-art programmable logic, provides all the necessary timing control signals required for overall system control and pulse synchronization. By adding DDS features, PulseBlasterDDSTM can now meet all the excitation/stimuli needs of demanding users.

PulseBlasterDDSTM provides users the ability to control their systems through the generation of both digital control signals and fully synchronized excitation RF pulses from a small form factor PC board, providing users a compelling price/performance proposition unmatched by any other device on the market today.

The two major building blocks of the PulseBlasterDDS-I-300 are the DDS Core and the Pulse Programming and Timing Processor Core (PP Core). The DDS Core contains a Numerically Controlled Oscillator (NCO), 16 programmable phase registers, 16 programmable frequency registers, the AWG(Arbitrary Waveform Generator), and the adjustable attenuator.

The PP Core controls the timing of the gating pulses and provides the necessary control signals for frequency and phase registers. The DDS and PP cores have been integrated onto a single silicon chip. High performance DAC chips and high current output amplifiers complement the design.

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