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PC104P-SIO4B
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PC104P-SIO4B High-performance Serial I/O (to 10Mbits/ sec)
PC104P-SIO4B High-performance Serial I/O (to 10Mbits/ sec)
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 PC104P-SIO4B (PDF 309Ko)

Features
  • Four Independent Multi-Protocol Serial Channels
  • Synchronous Serial Data Rates up to 10M bits/sec differential and 250k bits/sec with optional RS232 transceivers
  • Asynchronous Serial Data Rates up to 1M bit/sec differential and 250k bits/sec with optional RS232 transceivers
  • SCSI II type 68 pin front edge I/O Connector with optional cable adapter to four DB25 connectors
  •  Independent Transmit and Receive FIFO Buffers for each Serial Channel – Up to 32k Deep Each
  • Serial Mode Protocols include Asynchronous, Bi-sync, Mono-sync, SDLC, HDLC, Ethernet, and Nine-Bit
  • Parity and CRC detection capability
  • Four Programmable Oscillators provide increased flexibility for Baud Rate Clock generation
  • Two Serial Clocks, Two Serial Data signals, Data Carrier Detect signal, and Clear-To-Send signal per Channel
  • Unused signals may be reconfigured as general purpose IO (for RTS capability)
  • Fast RS485/RS422 Differential Cable Transceivers to Provide Increased Noise Immunity
  • RS232 Cable Transceiver Option (Max guaranteed Data Rate 250kbps)
  • Industry Standard Zilog Z16C30 Multi-Protocol Universal Serial Controllers (USC®)
  • Dual PCI DMA Engine to speed transfers and minimize host I/O overhead
  • A variety of device drivers are available, including VxWorks, WinNT, Win2k, Linux, and Labview available
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Description
  • The PC104P-SIO4B is a four channel full-duplex serial board that is available with RS-422/485 or RS232 transceivers. Each channel can operate up to 10Mbits/sec differential (RS-422/485) or 250 kbits/sec for RS232. Up to 32 Kbytes of FIFO buffering for both transmit and receive (256 Kbytes Total FIFOs) data on each channel provides for a smooth and efficient interface between the serial interfaces and the PC104P host computer.

    The board is based on the Zilog© Z16C30© high speed Integrated Universal Serial Controller (USC) which supports Asynchronous, Isochronous, Bisync, Monosync, HDLC, SDLC, External Sync and Nine-Bit protocols. The USC chip provides full duplex operation with baud rate generators, digital phase-locked loop for clock recovery and a full duplex DMA interface
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