AV121 - Phased-Array Radar-Receiver

Main features

  • 4 channels 4 Gsps 12-bit ADC
  • 4 independent Digital Down Converters, 1/4 to 1/32 decimation ratio
  • One Ultra Low jitter clock synthesizer
  • External or internal clock
  • External or internal reference
  • External trigger input with TDC
  • User programmable Xilinx® Virtex® 7 VX415T or VX690T FPGA
  • 667 MHz 256M64 DDR3 SDRAM
  • 3U OpenVPX standard compliant
  • Air cooled and Conduction cooled rugged versions
Price request Datasheet

The AV121 combines four 12-bit 4 Gsps ADCs with ultra high processing power delivered by Xilinx® Virtex® 7 FPGA, making it ideally suited for fully synchronous multiple channels test and measurement, Electronic Warfare, Ultra Wideband Radar receivers or MIMO applications.

The AV121 features an internal ultra-low jitter reference and one clock synthesizer and can be used with either external clock or an external reference for higher flexibility. The AV121 supports an external trigger signal coupled with a 15ps resolution Time to Digital Converter (TDC).

The AV121 includes one Xilinx® Virtex® 7 FPGA VX415T or VX690T for an impressive processing capability of more than 2 TMACs (Multiply Accumulate per second), one high speed 256M64 DDR3 SDRAM memory for data processing and a 1 Gb synchronous FLASH memory for multiple firmware storage.