The AV107 Phased-Array Radar-Receiver fully compliant with OpenVPX standard, accommodating various communication protocols such as PCIe, SRIO, 1 Gbit and XAUI 10 Gbit Ethernet, as well as non OpenVPX adopted standard such as Aurora.
The AV107 combines four 12-bit 2.5 Gsps ADCs with ultra high processing power delivered by Xilinx® Virtex® 7 FPGA, making it ideally suited for fully synchronous multiple channels test and measurement, Electronic Warfare, Ultra Wideband Radar Receivers or LIDAR applications.
- 4 channels 2.5 Gsps 12-bit ADC
- 4 independent Digital Down Converters, 120 or 240 MHz BW.
- 4 independent Low jitter clock synthesizers
- 4 External clock input/output
- External and internal reference
- External trigger input with TDC
- User programmable Xilinx® Virtex® 7 VX415T or VX690T FPGA
- 667 MHz 256M32 DDR3 SDRAM
- 3U OpenVPX standard compliant
- Air cooled and Conduction cooled rugged versions
For more information about AV107 Phased-Array Radar-Receiver download the following datasheet!